Advances in semi-conductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple cores and multiple logical processors present on individual integrated circuits. A processor or integrated circuit typically comprises a single processor die, where the processor die may include any number of cores or logical processors.
The ever increasing number of cores and logical processors on integrated circuits enables more software threads to be concurrently executed. However, the increase in the number of software threads that may be executed simultaneously have created problems with synchronizing data shared among the software threads. One common solution to accessing shared data in multiple core or multiple logical processor systems comprises the use of locks to guarantee mutual exclusion across multiple accesses to shared data. However, the ever increasing ability to execute multiple software threads potentially results in false contention and a serialization of execution.
For example, consider a hash table holding shared data. With a lock system, a programmer may lock the entire hash table, allowing one thread to access the entire hash table. However, throughput and performance of other threads is potentially adversely affected, as they are unable to access any entries in the hash table, until the lock is released. Alternatively, each entry in the hash table may be locked. Either way, after extrapolating this simple example into a large scalable program, it is apparent that the complexity of lock contention, serialization, fine-grain synchronization, and deadlock avoidance become extremely cumbersome burdens for programmers.
Another recent data synchronization technique includes the use of transactional memory (TM). Often transactional execution includes executing a grouping of a plurality of micro-operations, operations, or instructions. In the example above, both threads execute within the hash table, and their accesses are monitored/tracked. If both threads access/alter the same entry, conflict resolution may be performed to ensure data validity. One type of transactional execution includes a Software Transactional Memory (STM), where accesses are tracked, conflict resolution, abort tasks, and other transactional tasks are performed in software.
Often, in a read optimistic concurrency STM, lightweight barriers are performed for reads, such as logging versions associated with the reads, while more extensive barriers are performed for writes, such as acquiring a lock for the location to be written. In a direct ownership STM, an ownership test for a location is capable of being efficiently performed; as meta-data for the location indicates directly which transaction owns the location. However, during validation, if a location that is read and then written is encountered, the meta-data location does not include sufficient direct information for efficient validation. Consequently, a write set is potentially searched to determine if no other transaction updated the location between the read and the lock acquire for the write, which results in an expensive validation procedure.
In contrast, with an indirect STM, meta-data for locations often includes sufficient write-set entry information to perform efficient validation, i.e. determining if no other transaction updated the location between the read and the lock acquire for the write; as the meta-data include direct write entry location information. However, an ownership test during execution of the transaction in the indirect STM is potentially inefficient, since the transaction ownership information is accessed indirectly through a write entry of a write set.